88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/*
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* This file is part of NativeOS
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* Copyright (C) 2015-2018 The NativeOS contributors
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef ARCH_X86_ISRDEF_H_
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#define ARCH_X86_ISRDEF_H_
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/*
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* How many interrupts are supported at this moment:
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* o Interrupts 0-31 are reserved for the system.
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* o Interrupts 32-48 are reserved for hardware (PIC, keyboard, timer...)
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* o Still have to decide an interrupt for system calls.
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*/
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#define INTERRUPTS 48
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/*
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* These are my interrupt entrypoints. This is ugly, but it has to be done
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* since every interrupt is actually a different function (or memory address)
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* that has to be given to the IDT Table.
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*/
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extern void isr_0(void);
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extern void isr_1(void);
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extern void isr_2(void);
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extern void isr_3(void);
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extern void isr_4(void);
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extern void isr_5(void);
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extern void isr_6(void);
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extern void isr_7(void);
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extern void isr_8(void);
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extern void isr_9(void);
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extern void isr_10(void);
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extern void isr_11(void);
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extern void isr_12(void);
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extern void isr_13(void);
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extern void isr_14(void);
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extern void isr_15(void);
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extern void isr_16(void);
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extern void isr_17(void);
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extern void isr_18(void);
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extern void isr_19(void);
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extern void isr_20(void);
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extern void isr_21(void);
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extern void isr_22(void);
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extern void isr_23(void);
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extern void isr_24(void);
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extern void isr_25(void);
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extern void isr_26(void);
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extern void isr_27(void);
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extern void isr_28(void);
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extern void isr_29(void);
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extern void isr_30(void);
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extern void isr_31(void);
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extern void isr_32(void);
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extern void isr_33(void);
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extern void isr_34(void);
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extern void isr_35(void);
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extern void isr_36(void);
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extern void isr_37(void);
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extern void isr_38(void);
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extern void isr_39(void);
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extern void isr_40(void);
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extern void isr_41(void);
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extern void isr_42(void);
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extern void isr_43(void);
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extern void isr_44(void);
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extern void isr_45(void);
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extern void isr_46(void);
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extern void isr_47(void);
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/* Interrupt table. */
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extern unsigned int isr_vector[INTERRUPTS];
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#endif // ARCH_X86_ISRDEF_H_
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